What is Assembler ?- Definition from Trenovision

Assembler

An assembler is a kind of computer program that interprets software programs written in assembly language into machine language, code and instructions that can be executed by a computer.
It enables software and application developers to access, operate and manage a computer’s hardware architecture and components.
It is sometimes referred to as the compiler of assembly language. It also provides the services of an interpreter.


Data format

There are two types of Data definition in Assembler

  • Define Constants (DC)
  • Define Storage (DS)

Define Constants (DC)

The define constant instruction define a piece of storage with a initial value. The word constant is misleading because this value can be changed at any time. This storage area will take up space in your program.
Instruction format for Defining Constants (DC)
    label   DC  dtl ‘C’
 
The ‘d’ defines a duplication factor and this is optional. If left out this will be assumed to be one.
The ‘t’ defines the type of data the storage area will contain.
‘l’ Allows you to define an explicit length.
Example 
   X  DC  C15’ABC’

Defining Storage (DS)

The instruction format is very similar to the define constant instruction. The major difference is with DS you define or reserve the storage but the storage area does not get initialized to a initial value at definition time. If you do supply a constant value it would not be used. As with DC the duplication value can be set to zero to force boundary alignment. The bytes skipped will not be set to zero.
Instruction format for Defining Constants (DS)
    label   DS  dtl ‘C’
 
The ‘d’ defines a duplication factor and this is optional. If left out this will be assumed to be one.
The ‘t’ defines the type of data the storage area will contain.
‘l’ Allows you to define an explicit length.
Example 
   X  DS  CL133
 



Some of the valid Storage types in Assembler are given below.

  • F – Fullword (4 bytes)
  • H – Halfword (2 bytes)
  • X – Hex value (1 byte)
  • B – Binary data (1 byte)
  • C – Character data (1 byte)
  • E or D – Floating Point Numbers
  • P – Packed Decimal
  • Z – Zoned Decimal
  • A – Address Constant
  • V – Address Constant

Instruction format

Movement of data

  • Storage to Storage (SS)
  • Storage Immediate (SI)
  • Register to Indexed Storage (RX)
  • Register to Register (RR)
Assembler
Instruction format

Storage to Storage (SS1)

General Format:  
OP   LL1   B1D1   D1D1   B2D2   D2D2

  • OP – Operation code
  • LL1 – Length of Op One – 1 (Max 255)
  • B1D1D1D1 – Base/Disp of Operand 1
  • B2D2D2D2 – Base/Disp of Operand 2

This format move data from one storage area to another. Notice the first operand contains a length value. This is the amount of data that would be involved in this instruction.

Storage to Storage (SS2)

General Object Format: 
OP   L1L2   B1D1   D1D1   B2D2   D2D2

  • OP – Operation code
  • L1 – Length of Operand One – Max value 15
  • L2 – Length of Operand Two – Max value 15
  • B1D1D1D1 – Base/Disp of Operand 1
  • B2D2D2D2 – Base/Disp of Operand 2

In this format the length area need to be shared between L1 and L2. This implies a maximum value of 15 x’F’ can be stored in these areas. The rest of this instruction is the same as format 1.
 

Register to Register (RR)

These instructions does operations between registers
General Object Format:
OP   R1R2

  • OP – Operation code
  • R1 – Operand 1 register
  • R2 – Operand 2 register

Storage Immediate (SI)

General Object Format: 
OP   II2   B1D1  D1D1

  • OP – Operation code
  • II2 – Immediate Constant – Operand 2
  • B1D1D1D1 – Base/Disp of Operand 1

The SI instructions is known as a storage immediate instruction. These instructions used single bytes to perform move or compare functions
 
 

Register to Indexed Storage (RX)

General Object Format:  
OP   R1X2   B2D2  D2D2

  • OP – Operation code
  • R1 – Operand 1 Register
  • X2 – Operand 2 Register
  • B2D2D2D2 – Base/Disp of Operand 2

The RX instructions does operations between registers and storage areas. It processes binary fullwords from register to storage and storage to registers. You can load a value into a register to use as a index register. If you do not use a index a zero will be in the index position for this instruction.
 

Register to Storage (RS)

General Object Format
OP   R1R3   B2D2  D2D2

  • OP – Operation code
  • R1 – Operand 1 Register
  • R3 – Operand 3 Register or Mask
  • B2D2D2D2 – Base/Disp of Operand 2

The RS instructions processed binary data 1 to 4 bytes in length.
 

What is Program Status Word ?

Program Status Word is a logical collection of data that indicates the current status of the machine
It Contains two important fields:

  • Condition Code (2 bits)
  • Instruction Address (24 or 31 bit addresses)

 


Assembler program structure

Assembler program is coded based on the following conventions

  • Label area starts in column 1
  • Mnemonic starts in column 10
  • Operands start in column 16
  • Comments start in column 40 through 71
  • Continuation has to be in column 72

The following rules also should be followed

  • Label have to start in column 1.
  • At least 1 blank has to be between the mnemonic and the operand.
  • At least 1 blank must be between the operand and and comments
  • And continuation character must be in column 72 if the line will continue on the next line.



Assembler program structure

The Assembler program structure can be in either of the following ways

Assembler program structure
Assembler program structure

  • In an Assembler program comments start with a *. Anything beyond the * will be considered comments.
  • The label value has naming restrictions. The length use to be limited to 8 characters but these days it can be up to 63 bytes long. The label have to start with a alphabetic letter or one of these special characters $, @ or #. It may contain numeric data after these rules has been followed.
  • Beyond these rules anything goes.
  • Labels will be used in your program by the assembler during your assembly process to determine the implicit address for this storage area. If you did not code a label you would have to define a base and displacement address for every storage element you want to use. Using the base and displacement method of accessing storage is called the explicit address.

 


Assembler STATEMENT

 
Positon  1 :  With an *, the whole statement is a comment
Position 1 to  8   :  Symbol
Position 9 to 14  : Instruction Mnemonic Code
Position 16 to 71: Operands and comments; continuation                       must begin from position 16
Position          72 :  If filled with any character, indicates that
                                this statement continues in the next one
Positions 73 a 80: Identification & sequence
123456789012345678901234567890123456789012345678901234567890123456789012
*   THIS WHOLE STATEMENT IS A COMMENT
FILLING  MVC   PRAREA,=CL133‘ ‘     COMMENT = CLEARS PRAREA
XI    *+5,X’F0’            COMMENT = FORCE BRANCH
BC    0,TOGGLE             COMMENT = SOMETIMES NOP
*                                             SOMETIMES BRANCH
HERE     EQU   *
WMESSAGE DC    C’AJK001A – FILE BEING OPENED HAS NO DD STATEMENT IN THE–
JCL. WAKE UP AND INCLUDE IT!.’    HERE WE HAVE A COMMENT
 

Assembly program

  • Assembler commands
  • Machine instructions
  • Macro-instructions

Assembler commands

  • Area definition: DC, DS, CCW, CCW0, CCW1
  • Program sectioning and linking : START, CSECT, DSECT, DXD, CXD, COM, ENTRY, EXTRN, WXTRN
  • Base register control: USING, DROP
  • Listing control: TITLE, EJECT, SPACE, PRINT
  • Misc control: ICTL, ISEQ, PUNCH, REPRO, ORG, EQU, OPSYN, PUSH, POP, LTORG, CNOP, COPY, END, LOCTR, AMODE, RMODE

Macro instruction

  • AREAD, MACRO, MEXIT, MEND
  • Conditional assembly (normally used to do macro instructions): ACTR, AGO, AIF, ANOP, GBLA, GBLB, GBLC, LCLA, LCLB, LCLC, MHELP, MNOTE, SETA, SETB, SETC

Machine instructions
Storage to Storage move : MVC, MVZ, MVN, MVI, MVO, ZAP, MVCL, PACK, UNPK, MVCI

  • Register to Storage move : ST, STH, STM, STC, STCM, CVD
  • Storage to Register move : L, LH, LM, IC, ICM, CVB
  • Register to Register move : LR, LPR, LNR, LCR, LTR
  • Arithmetic with Storage fields in the packed format : AP, SP, MP, DP, SRP
  • Arithmetic with Registers (fixed point binary) : AR, SR, MR, DR, ALR, SLR
  • Arithmetic with Register and Storage (fixed point binary) : A, S, M, D, AH, SH, MH, AL, SL
  • Compare : CP, CLC, CLI, CLCL, C, CH, CL, CLM, CR, CLR
  • Branch : BC, BCR
  • Loop Control : BCT, BCTR, BXH, BXLE
  • Edition : ED, EDMK
  • Byte Translation and test: TR, TRT
  • Register Shift : SLL, SRL, SLDL, SRDL, SLA, SRA, SLDA, SRDA
  • Boolean Algebra : N, O, X, NR, OR, XR, NI, OI, XI, NC, OC, XC

 


Assembler commands

AMODE DROP ISEQ RMODE
CCW DS LOCTR SPACE
CCW0 DSECT LTORG START
CCW1 DXD OPSYN TITLE
CNOP EJECT ORG USING
COM END POP WXTRN
COPY ENTRY PRINT
CSECT EQU PUNCH
CXD EXTRN PUSH
DC ICTL REPRO

 

Assembler commands – AMODE

AMODE (Adressing Mode)

  • This command is used to indicate to the assembler the addressing mode associated to a Control Section.

[symbol]    AMODE   n       

n may be  24 or 31 or ANY.

  • Symbol is optional.
  • If omitted, the addressing mode will be associated to the blank (no name) Control Section that must exist in the program.
  • If specified, the addressing mode will be associated to the Contro,l Section with the same name as indicated in the symbol.
  • The operand indicates the addressing mode that must be associated with the Control Section. One must specify 24 (24-bit addressing), 31 (31-bit addressing) or ANY (the Control Section isn’t sensitive to the addressing mode).
  • There must be only one AMODE for each Control Section.
  • The AMODE command may be specified at any point in the program.
  • AMODE 24 is not compatible with RMODE ANY.

Assembler commands – RMODE

RMODE (Residence Mode)

  • This command is used to indicate to the assembler the residence mode associated to a Control Section.

  [symbol]    RMODE   n     

  n may be 24 or ANY.

  • Symbol is optional.
  • If omitted, the residence mode will be associated to the blank (no name) Control Section that must exist in the program.
  • If specified, the residence mode will be associated to the Contro,l Section with the same name as indicated in the symbol.
  • The operand indicates the residence mode that must be associated with the Control Section. One must specify 24 (24-bit residence = the CSECT must reside bellow the 16MB line), or ANY (24-bit or 31-bit residence = the CSECT may reside bellow or above the 16MB line).
  • There must be only one RMODE for each Control Section.
  • The RMODE command may be specified at any point in the program.

 

Assembler commands – CSECT

  • CSECT command identifies the beginning or the continuation of a Control Section.

  [symbol]       CSECT

  • CSECT command have no operands.
  • If symbol is specified, it names the CSECT.
  • Commands and instructions specified after CSECT command will be part of it, up to another CSECT or DSECT command.
  • Many CSECT commands with the same symbol may appear in a program. The first one names the CSECT (and is the range of its first “piece”). The others identify their continuations (the other “pieces”).
  • To “interrupt” a DSECT, use another DSECT command or a CSECT command.

Assembler commands – DSECT

  • DSECT command defines a section used to do address convertions to Base+Shift format; it doesn’t allocate areas, it’s just used by the assembler to build the symbol table and determine the displacements of the fields it contains. It’s often used to describe an area ‘ structure., without phisically allocating storage for it. Syntax is:

  symbol       DSECT

  • DSECT command have no operands.
  • The symbol names the DSECT.
  • Many DSECT commands with the same symbol may appear in a program. The first one names the DSECT (and is the range of its first “piece”). The others identify their continuations (the other “pieces”).
  • To “interrupt” a DSECT, use another DSECT command or a CSECT command.

 


MACHINE INSTRUCTIONS

Machine instructions (by group)

  • Storage to Storage move : MVC, MVZ, MVN, MVI, MVO, ZAP, MVCL, PACK, UNPK, MVCIN
  • Register to Storage move : ST, STH, STM, STC, STCM, CVD
  • Storage to Register move : L, LH, LM, IC, ICM, CVB
  • Register to Register move : LR, LPR, LNR, LCR, LTR
  • Arithmetic with Storage fields in the packed format : AP, SP, MP, DP, SRP
  • Arithmetic with Registers (fixed point binary) : AR, SR, MR, DR, ALR, SLR
  • Arithmetic with Register and Storage (fixed point binary) : A, S, M, D, AH, SH, MH, AL, SL
  • Compare : CP, CLC, CLI, CLCL, C, CH, CL, CLM, CR, CLR
  • Branch : BC, BCR
  • Loop Control : BCT, BCTR, BXH, BXLE
  • Edition : ED, EDMK
  • Byte Translation and test: TR, TRT
  • Register Shift : SLL, SRL, SLDL, SRDL, SLA, SRA, SLDA, SRDA
  • Boolean Algebra : N, O, X, NR, OR, XR, NI, OI, XI, NC, OC, XC
  • Load and branch : BALR, BAL, BAS, BASR, BASSM, BSM
  • Misc : LA, TM, EX, SVC, MC, SPM, IPM, STCK, TS, CS, CDS

Following are some of the Hints while coding Machine Instructions.

  • STORE = FROM register TO storage
  • LOAD = FROM storage TO register
  • xxxxR = RR instruction, operands are both registers
    Example: AR,SR, LR, MR, DR, LTR
  • xxxxI = SI instruction, 1 operand is an immediate operand; it is the 2nd byte of the instruction, and is specified via an self-defining term (1 byte length)
    Example: MVI, SI, NI, OI, XI, etc
  • xxxxP = SS instruction, decimal packed operands, 2 lengths specification
    Example: AP, SP, MP, DP, ZAP
  • xxxxH = RX instruction, operands are 1 register and 1 halfword storage field
    Example: LH, SH, AH
  • Nxxxx = boolean instruction AND
    Example: NI, NC, N, NR
  • Oxxxx = boolean instruction OR
    Example: OI, OC, O, OR
  • Xxxxx = boolean instruction Exclusive OR
     Example: XI, XC, X, XR
  • Most instructions (except CVD and the STORE ones STC, ST, STH, STCM, STM): symbol     instruction    receiver_operand,emitter_operand
  • STORE and CVD instructions: symbol     instruction    emitter_operand,receiver_operand
  • Arithmetic and bit shift operations (algebraic / logic operations):
    Unless othewise stated, these operations are done algebraically.
    This is always true for decimal packed fields.
    For binary fixed point numbers (in storage and/or registers) some operations that work algebraically and other operations work logically.
    Algebraic operations uses:
    15-bit binary numbers + 1 bit sign for 2 byte numbers
    31-bit binary numbers + 1 bit sign for 4 byte numbers
    63-bit binary numbers + 1 bit sign for 8 byte numbers
    Logical operations assume numbers are always positive and uses:
    16-bit binary numbers for 2 byte numbers
    32-bit binary numbers for 4 byte numbers
    64-bit binary numbers for 8 byte numbers